Made reasonable progress today. Implemented the rest of the test harness, and verified that, just a couple of minor errors (got SLT and SLTU swapped), then it passed okay.
Then I dragged out my emulator framework and tweaked that so it is suitable for RV32I, and that too is running, loading in verifier code and running it. Though I haven't run the full verifier yet, just the wrapper code. It should run though. The debugger and everything is all set up, and its the same as my other debuggers.
Once I've verified the emulator, which shouldn't take long, then the next thing to think about is the assembler thing. I'm considering a sort of FORTH type design, no stack though, but with words, some of which are user defined and some of which do other things, like if/else/endif does say. The downside is that the developer cannot write their own code to generate code, macros should be possible though, but the code generating stuff will have to be in Python.
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